Various techniques exist for manufacturing micro-electro-mechanical (MEM) devices, also known as micro-electro-mechanical systems (MEMS) devices. In a typical process, single crystal silicon MEM devices are created using bulk etching, silicon-on-insulator (SOI) wafers or buried cavity techniques. One technique has formed a MEM device, having a buried cavity, by etching a cavity in a handle wafer and then bonding an active wafer to the handle wafer. In a usual case, the active wafer is then thinned to form a single crystal silicon diaphragm (membrane) that is suspended above the cavity. It is generally desirable to manufacture MEM devices with a buried cavity process as the size of such devices are reduced (which lowers cost), as compared to devices made through bulk etch techniques which rely on a tapered etch from the back of the handle wafer to form the diaphragm. Furthermore, MEM devices incorporating buried cavities and including moving structures that are formed with a dry deep reactive ion etch (DRIE) process do not exhibit process induced stiction problems. For example, U.S. Pat. Nos. 5,706,565 and 5,831,162, each of which are hereby incorporated herein by reference in their entirety, describe sensors made by buried cavity techniques.
However, MEM devices made by buried cavity techniques are, in general, temperature limited as the diaphragm may plastically deform during processing if a process temperature is too high. In general, the temperature at which a diaphragm deforms is low enough that the buried cavity technique is incompatible with most complementary metal-oxide semiconductor (CMOS) processes.
Plastic deformation of silicon occurs when the stress in the silicon exceeds the flow stress of the silicon. In general, this occurs in buried cavity MEM processes when thin diaphragms are created and stress, induced by differential pressure across the cavity or by thin films, exceeds the flow stress limit, which is a function of temperature for silicon. While this phenomena has been utilized by designers to purposely plastically deform membranes of MEM devices that function as switches, plastic deformation is undesirable in other applications. Typically, for most applications, the membrane thickness and cavity size for a buried cavity MEM device is such that the membrane generally cannot tolerate temperatures above 800° C. without experiencing plastic deformation.
What is needed is a technique for creating a MEM device, with a buried cavity, that is compatible with most complementary metal-oxide semiconductor (CMOS) processes.